A successful candidate is expected to lead the algorithmic-firmware-systems integration effort for various Ather products and be responsible for qualifying and integrating algorithms at various stages with HW. She or he will also be responsible for defining the end implementation of the algorithm at the product level as well as for defining and exposing various algorithmic sub-layers for dev-level testing. 

The individual will also be involved in figuring out how to adapt established algorithms to new HW platforms and use cases. Fundamentals in mathematics/physics are desired with a strong interest in learning new mathematical techniques and their applications.

Additionally, the individual is also expected to evaluate the effectiveness of algorithms on particular hardware platforms and recommend strategies to optimize algorithm performance such as factory/in-field calibration, coefficient delivery, metrics to determine algorithm performance etc.. 

She or he will be responsible for working with algorithm architects, validation and other cross-functional teams to define testing strategies for algorithms under their purview. Other tasks include documenting the algorithm/platforms under their purview and maintaining codebase specific to a product.